1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to an overvoltage protection circuit.
2. Description of Related Art
Demand for an increase in surge breakdown voltage in a power switch for automotive electrical equipment has been growing in recent years. For example, an inductance load such as a solenoid or an inductance component of a wire harness is connected to an output stage of a power switch for automotive electrical equipment. If an inductance load is connected to an output stage of a power switch, as described above, a back electromotive force is generated when the power switch is turned off. The voltage of a voltage surge corresponding to the back electromotive force may be applied to the output stage of the power switch. In this case, if the voltage exceeds the breakdown voltage (withstand voltage) of a transistor in the output stage of the power switch, then the output transistor breaks down, and a breakdown current flows. The breakdown current degrades the output transistor, which is problematic. For this reason, in a power switch, an output transistor is generally protected from overvoltage using an overvoltage protection circuit.
FIG. 6 shows a circuit diagram of a semiconductor device (overvoltage protection circuit) according to U.S. Pat. No. 6,700,428. A semiconductor device 10 shown in FIG. 6 includes a first terminal K1, a second terminal K2, a load Z, a first transistor T1, a control input terminal K3, a voltage control circuit SB, a gate discharge circuit SC, and a temperature sensor circuit TS.
The first terminal K1 is connected to one terminal of the load Z. The other terminal of the load Z is connected to a first power supply (high-side power supply) V+. The second terminal K2 is connected to a second power supply (low-side power supply) GND. A driving signal S1 is supplied to the semiconductor device 10 through the control input terminal K3. The first transistor T1 is an n channel type power MOSFET and has a drain connected to the first terminal K1 and a source connected to the second terminal K2. With this configuration, the first transistor T1 forms a main current path for supplying current to the load. A gate of the first transistor T1 is connected to the control input terminal K3 for controlling a driving current for the first transistor T1 through a resistor R1. Note that the first transistor T1 has a gate-to-source capacitance Cg (parasitic capacitance) between the gate and the source.
The voltage control circuit SB is connected between the drain and the gate of the first transistor T1. A second control signal S2 is supplied to the voltage control circuit SB. The voltage control circuit SB exhibits a conducting state if there is a risk that the source-to-drain voltage of the first transistor T1 rises to break down the first transistor T1 (e.g., generation of a back electromotive force caused by the inductance or the like of the load). Electric charge is supplied from the drain of the first transistor T1 to the gate, thereby causing the first transistor T1 to exhibit a conducting state. This prevents the source-to-drain voltage Uds of the first transistor T1 from rising further.
The voltage control circuit SB has a first zener diode Z1, a second zener diode Z2, a diode D1, and a second transistor T2. The first zener diode Z1 and second zener diode Z2 are series-connected to each other. The second transistor T2 is a p channel type MOSFET and is connected in parallel with the second zener diode Z2. The second control signal S2 is inputted to a gate of the second transistor T2. The two zener diodes Z1 and Z2 are connected in a reverse direction between the drain and the gate of the first transistor T1. The diode D1 is series-connected to the two zener diodes Z1 and Z2. The diode D1 is also connected in a forward direction between the drain and the gate of the first transistor T1. This prevents a current from flowing from the gate of the first transistor T1 into the drain.
The gate discharge circuit SC has a driving circuit A3 and a third transistor T3. A source of the third transistor T3 is connected to the second power supply GND through the second terminal K2. A drain of the third transistor T3 is connected to the gate of the first transistor T1. An output terminal of the driving circuit A3 is connected to a gate of the third transistor T3. That is, the on-off state of the third transistor T3 is controlled by a third control signal S3 outputted from the driving circuit A3. An output terminal of the temperature sensor circuit TS thermally coupled to the first transistor T1 is connected to an input terminal of the driving circuit A3. That is, a temperature detection signal S4 outputted from the temperature sensor circuit TS based on the temperature state of the first transistor T1 is inputted to the driving circuit A3.
The operation of the circuit shown in FIG. 1 will be described briefly. FIG. 7 illustrates timing charts showing the operation of the circuit in FIG. 6. Note that, as will be described below, a problem may occur if the first transistor T1 is turned off (the first transistor T1 is controlled to switch from an on state to an off state) at high speed during a process in which the operation shown in FIG. 7 shifts from [f] to [g].
A case where the first transistor T1 is turned off ([c] in FIG. 7) will be described first. The first control signal S1 at low level is inputted to the gate of the first transistor T1. This causes electric charge accumulated in the gate-to-source capacitance Cg of the first transistor T1 to be discharged and the first transistor T1 to exhibit a non-conducting state. The second control signal S2 at high level is inputted to the gate of the second transistor T2. This causes the second transistor T2 to exhibit a non-conducting state. If a back electromotive force is generated by an inductance load or a wiring inductance (hereinafter referred to as a load inductance component) during the operation process, then the source-to-drain voltage of the first transistor T1 may rise.
In this case, if the source-to-drain voltage of the first transistor T1 becomes higher than a voltage (clamping voltage) which is set on the basis of the breakdown voltages of the zener diodes Z1 and Z2, then a current flows from the drain of the first transistor T1 to the gate through the zener diodes Z1 and Z2. (Note that it is actually necessary to set the clamping voltage in consideration of a resistance component of the diode D1, a wiring resistance component, a gate-to-source voltage for turning on the first transistor T1, and the like, in addition to the above-described breakdown voltage.) The flow of the current from the drain of the first transistor T1 to the gate causes electric charge to be stored in the gate-to-source capacitance Cg of the first transistor T1. The first transistor T1 thus exhibits a conducting state. For this reason, the source-to-drain voltage of the first transistor T1 can be limited to the clamping voltage.
The operation ([g] in FIG. 7) when the first transistor T1 is turned on ([e] in FIG. 7), and the temperature sensor circuit TS detects a temperature anomaly (hereinafter referred to as a load anomaly) ([f] in FIG. 7) will be described. In this case, the third transistor T3 included in the gate discharge circuit SC is brought into conduction, thereby discharging the electric charge accumulated in the gate-to-source capacitance Cg of the first transistor T1. This brings the first transistor T1 out of conduction. In contrast, the second transistor T2 exhibits a conducting state and shorts the second zener diode Z2. In this case, if a back electromotive force caused by a load inductance component is generated during a process in which the electric charge accumulated in the gate-to-source capacitance Cg of the first transistor T1 is discharged, and the first transistor T1 exhibits a non-conducting state, then the source-to-drain voltage of the first transistor T1 may rise.
When the source-to-drain voltage of the first transistor T1 becomes higher than the voltage (clamping voltage) set on the basis of the breakdown voltage of the first zener diode Z1 in this state ([e] in FIG. 7), a current flows from the drain of the first transistor T1 to the gate through the zener diode Z1. (Note that it is actually necessary to set the clamping voltage in consideration of the resistance component of the diode D1, the wiring resistance component, the gate-to-source voltage for turning on the first transistor T1, and the like, in addition to the above-described breakdown voltage.) The flow of the current from the drain of the first transistor T1 to the gate causes electric charge to be stored in the gate-to-source capacitance Cg of the first transistor T1. The first transistor T1 thus exhibits a conducting state. For this reason, the source-to-drain voltage of the first transistor T1 can be limited to the clamping voltage.
However, the third transistor T3 of the gate discharge circuit SC is in a conducting state at this time. Accordingly, a large current flows from the first power supply V+ to the third transistor T3 through the first zener diode Z1. In order to bring the first transistor T1 into conduction in this case, it is necessary to generate a gate voltage enough to bring the first transistor T1 into conduction to compensate for a voltage drop caused by the third transistor T3.
In this case, a voltage corresponding to a voltage drop generated by the product of the internal resistance of the first zener diode Z1 and a current flowing therethrough is added to a voltage for clamping the first transistor T1. This is shown in FIG. 5. FIG. 5 shows the static characteristic of a zener diode (e.g., Z2). The abscissa indicates the inverse voltage of the zener diode while the ordinate logarithmically indicates a zener diode current. At the time of turnoff under a normal load, the zener diode operates as indicated by an operating point Q1. In contrast, since the current flowing through the zener diode increases from lz1 to lz2 in voltage control operation at the time of turnoff after a load anomaly is detected, the zener diode operates as indicated by an operating point Q2. This increases the inverse voltage of the zener diode from Vz1 to Vz2.
As described above, in turnoff operation with a load anomaly, a voltage corresponding to a voltage drop generated by the product of the internal resistance of the first zener diode Z1 and a current flowing therethrough is added to the voltage for clamping the first transistor T1. For this reason, even if the source-to-drain voltage of the first transistor T1 rises and reaches a withstand voltage due to a load inductance component, the voltage control circuit SB may not conduct. This may break down the first transistor T1.
A similar problem occurs if the semiconductor device of the prior art shown in FIG. 6 is used in a high-side configuration (the circuit configuration is not shown) in which the first power supply V+ is connected to the first terminal K1, and the second power supply GND is connected to the second terminal K2 through the load Z. FIG. 8 shows timing charts when the high-side configuration is adopted. Note that if the first transistor T1 is brought into conduction when the high-side configuration is adopted, then it is common to apply a voltage obtained by boosting a voltage at the first power supply V+ to its gate (the voltage is generally generated by a boost circuit such as a charge pump).
Consider a case where the third transistor T3 of the gate discharge circuit SC has low impedance in turnoff operation with a load anomaly. The sections [e], [f], and [g] in FIG. 8 indicate a process to when electric charge accumulated in the gate-to-source capacitance Cg of the first transistor T1 is discharged at high speed (the broken lines in [e] in FIG. 8), and the first transistor T1 exhibits a non-conducting state. In this case, even if the source-to-drain voltage of the first transistor T1 rises and reaches the withstand voltage due to a load inductance component, the voltage control circuit SB may not conduct. This may break down the first transistor T1, which is problematic.
Also consider a case where the third transistor T3 of the gate discharge circuit SC has high impedance in turnoff operation with a load anomaly. In this case, the gate voltage of the first transistor T1 is boosted by a boost circuit or the like. Accordingly, the first transistor T1 remains in an overcurrent state until the gate voltage of the first transistor T1 is lowered to near the voltage at the first power supply V+. That is, it takes long time to turn off the first transistor T1. For this reason, the first transistor T1 suffers from the problem of thermal stress corresponding to a delay time.